1. Field of the Invention
This invention relates generally to depositing semiconductor films, such as those containing Si, Ge and/or carbon for integrated circuit fabrication. More particularly, the invention relates to making these materials with greater control of thickness and composition in chemical vapor deposition systems.
2. Description of the Related Art
As the dimensions of microelectronic devices become smaller, the importance of the physical and chemical properties of the materials used in their manufacture becomes more important. This is particularly true for those advanced materials that can be integrated into existing generations of devices using already-proven manufacturing tools. For example, it is desirable to incorporate epitaxial Si1-xGex and Si1-x-yGexCy alloys into Bipolar and BiCMOS device manufacturing processes to improve device efficiency and reliability. These advanced alloy materials have utility, for example, as base layers in heterojunction bipolar transistors (HBT), resistors in BiCMOS devices and as gate electrodes in CMOS, NMOS, and DMOS devices and various other integrated electronic devices.
Conventional processes for the deposition of single crystal, amorphous and/or polycrystalline silicon, silicon germanium (SiGe) and silicon germanium carbon (SiGeC) alloys are typically performed using batch thermal processes (either low pressure (LP) or ultra-high vacuum (UHV) conditions) or single wafer processes. Single wafer processes are becoming increasingly significant, but a number of problems remain. For instance, within-wafer and wafer-to-wafer uniformity, deposition rates, and process repeatability remain a concern with conventional single wafer processes, particularly for in situ doped semiconductor films. As wafers continue to increase in size (currently 300 mm wafers are being integrated into fabrication processes), maintaining uniformity is becoming more challenging still.
Japanese Patent Application Disclosure Number S60-43485 discloses the use of trisilane to make amorphous thin films at 300° C., apparently for photovoltaic applications. Japanese Patent Application Disclosure Number H5-62911 discloses the use of trisilane and germane to make epitaxial thin films at 500° C. or less. Japanese Patent Application Disclosure Number H3-91239, H3-185817, H3-187215 and HO2-155225 each disclose the use of disilane, some also mentioning trisilane.
The art has generally focused on the use of disilane and trisilane for producing amorphous, hydrogenated silicon at relatively low deposition temperatures, particularly for photovoltaic cells. However, there remains a need for a process for depositing semiconductor materials such as doped silicon, low-H content amorphous silicon and SiGe onto surfaces, preferably at high deposition rates without sacrificing good uniformity.